6 Commits

Author	SHA1	Message	Date
Louie Tsai	5c8d34a42c	Support no privileged mode on CPU for docker and kubernetes deployments (#19241) ... Signed-off-by: Tsai, Louie <louie.tsai@intel.com>	2025-06-11 04:11:47 -07:00
rongfu.leng	4e9cf8c1dd	[Bugfix] fix gettid method is not define (#16084) ... Signed-off-by: rongfu.leng <rongfu.leng@daocloud.io>	2025-04-08 19:12:44 -07:00
Li, Jiang	550b2801ad	[CPU][Bugfix] Using custom allreduce for CPU backend (#15934) ... Signed-off-by: jiang1.li <jiang1.li@intel.com>	2025-04-02 07:46:47 -07:00
Wallas Henrique	cfd3219f58	[Hardware][Apple] Native support for macOS Apple Silicon (#11696) ... Signed-off-by: Wallas Santos <wallashss@ibm.com> Co-authored-by: Michael Goin <michael@neuralmagic.com>	2025-01-08 16:35:49 +08:00
Li, Jiang	0b952af458	[Hardware][Intel] Support compressed-tensor W8A8 for CPU backend (#7257)	2024-09-11 09:46:46 -07:00
Li, Jiang	3bbb4936dc	[Hardware] [Intel] Enable Multiprocessing and tensor parallel in CPU backend and update documentation (#6125)	2024-07-26 13:50:10 -07:00